Implementación de un circuito custom DSP en FPGAs para cálculo del determinante 3x3, y matriz inversa de matrices ortogonales 3x3 - Implementation of an orthogonal custom DSP FPGA circuit for calculating the determinant 3x3 and 3x3 matrix inverse
DOI:
https://doi.org/10.32870/recibe.v4i2.38Palabras clave:
Determinante, FPGA, Matriz inversaResumen
En este artículo se presenta el diseño e implementación de un circuito digital a medida para el cálculo de determinantes de orden 3x3 y matriz inversa de matrices ortogonales 3x3. Se analizan los resultados de la implementación de los circuitos en dos plataformas de familias de dispositivos reconfigurables, estas son Artix 7 y Spartan 6 Low-Power, en los que se comparan la ocupación y los tiempos de respuesta. La descripción del circuito se realizó en Lenguaje de Descripción de Hardware (HDL).Abstract: In this paper are presented the design and implementation of a digital circuit suited for the calculous of 3X3 determinants and inverse matrix of orthogonal 3X3 matrixes. The circuits’ implementation results are analyzed in two platforms of the family of reconfigurable devices: Artix 7 and Spartan 6 Low-Power, for which occupation and respond answer were compared. The circuit description was made in hardware description language (HDL).Keywords: Desterminants, FPGA, inverse matrix.Citas
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