Retos Sobre el Modelado del Transistor de Compuerta Flotante de Múltiples Entradas en Circuitos Integrados - Challenges on Modeling of Floating Gate Transistor Multiple Entries Integrated Circuits

Autores/as

  • Agustín Santiago Medina Vázquez Centro Universitario de Ciencias Exactas e Ingenierías Universidad de Guadalajara, México
  • María Elena Meda Campaña Centro Universitario de Ciencias Económico Administrativas Universidad de Guadalajara, México
  • Marco Antonio Gurrola Navarro Centro Universitario de Ciencias Exactas e Ingenierías Universidad de Guadalajara, México
  • Edwin Christian Becerra Álvarez Centro Universitario de Ciencias Exactas e Ingenierías Universidad de Guadalajara, México

DOI:

https://doi.org/10.32870/recibe.v1i1.5

Palabras clave:

CMOS, Analógico, Circuitos, Integrados, Compuerta-flotante, muy bajo voltaje

Resumen

En este artículo se presentan las consideraciones que hay que adoptar para el uso del transistor de compuerta flotante de múltiples entradas para el diseño de circuitos integrados analógicos. Para ello se presentan las principales características de este transistor así como sus principales ventajas con respecto al transistor MOSFET convencional que este dispositivo ofrece. También, se exponen los principales problemas que han frenado el uso de este dispositivo en el ámbito comercial debido a la falta de modelos precisos.Abstract: In this paper are presented the considerations that we have to adopt to use the floting gate transistor of multiple entries to to design analogic integrated circuits. To get in that, here are presented the main characteristics of this transistor and its main advantages respecting to conventional MOSFET transistor that this device offers. Also, main problems that have stopped the usage of this device in the commercial environment due the lack of exact models are expossedKeywords: CMOS, Analogic, Circuits, Integrated, floting-gate, Very low voltage

Biografía del autor/a

Agustín Santiago Medina Vázquez, Centro Universitario de Ciencias Exactas e Ingenierías Universidad de Guadalajara, México

Dr. Austin Santiago Medina Vazquez received the Bachelor degree on Communications and Electronics Engineering from the University of Campeche, Mexico in 1999, the Master degree on Telecommunications in 2003 in CINVESTAV Guadalajara, and the Doctoral degree on Science, with speciality on Integrated Circuit Design, from the CINVESTAV Zacatenco in 2009. Since 2009 he is working in the University of Guadalajara and his current research interests are mixed signal integrated circuit design. Nowadays, his main project is based in modelling and implementation of very low power integrated circuit based on the floating gate transistor.

María Elena Meda Campaña, Centro Universitario de Ciencias Económico Administrativas Universidad de Guadalajara, México

Dr. María Elena Meda has received her PhD in electronic engineering in 2002 at the Research Center and Advanced Studies of the National Polytechnic Institute, Mexico. Since 2003 she works at the University of Guadalajara as a full time professor at the Information System Department. Her main research area is the modeling and applications of discrete event systems (DES) based on interpreted Petri nets (IPN).

Marco Antonio Gurrola Navarro, Centro Universitario de Ciencias Exactas e Ingenierías Universidad de Guadalajara, México

Dr. Marco A. Gurrola-Navarro received the Bachelor degree on Communications and Electronics Engineering from the University of Guadalajara, Mexico in 1997, the Master degree on Earth Sciences from the University of Guadalajara, 2003, and the Doctoral degree on Science, with speciality on Integrated Circuit Design, from the National Institute of Astrophysics Optics and Electronics, at Tonantzintla, Mexico in 2009. Since 2009 he is working in the University of Guadalajara and his current research interests are mixed signal integrated circuit design, and SoC.

Edwin Christian Becerra Álvarez, Centro Universitario de Ciencias Exactas e Ingenierías Universidad de Guadalajara, México

Dr. Edwin Christian Becerra Alvarez received the B.S. degree on Communications and Electronic Engineering from the University of Guadalajara, Mexico in 2004, the M.S. degree on Electric Engineering from CINVESTAV, Mexico in 2006 and the Ph.D. degree on Microelectronics from the University of Seville, Spain in 2010. Since 2010 he is working in the University of Guadalajara and his current research interests are on CMOS RF circuits.

Citas

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Publicado

2017-12-05

Cómo citar

Medina Vázquez, A. S., Meda Campaña, M. E., Gurrola Navarro, M. A., & Becerra Álvarez, E. C. (2017). Retos Sobre el Modelado del Transistor de Compuerta Flotante de Múltiples Entradas en Circuitos Integrados - Challenges on Modeling of Floating Gate Transistor Multiple Entries Integrated Circuits. ReCIBE, Revista electrónica De Computación, Informática, Biomédica Y Electrónica, 1(1), III. https://doi.org/10.32870/recibe.v1i1.5

Número

Vol. 1 Núm. 1 (2012): Jun 2012 - Nov 2012

Sección

Electrónica